WM8731 / WM8731L
Production Data
t3
t3
t5
SDIN
t4
t6
t2
t8
SCLK
t7
t1
t10
Figure 8 Program Register Input Timing – 2-Wire MPU Serial Control Mode
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, XTI/MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Program Register Input Information
SCLK Frequency
0
526
kHz
us
ns
ns
ns
ns
ns
ns
ns
ns
SCLK Low Pulsewidth
SCLK High Pulsewidth
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
t1
t2
1.3
600
600
600
100
t3
t4
t5
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
t6
300
300
t7
t8
600
t10
900
PD, Rev 4.8, April 2009
19
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