Production Data
WM8711L
REGISTER
ADDRESS
BIT
LABEL
USB/
DEFAULT
DESCRIPTION
0001000
0
0
Mode Select
NORMAL
Sampling
Control
1 = USB mode (250/272fs)
0 = Normal mode (256/384fs)
Base Over-Sampling Rate
USB Mode
1
BOSR
0
0 = 250fs
1 = 272fs
5:2
SR[3:0]
0000
DAC sample rate Normal Mode
control;
0 = 256fs
1 = 384fs
See USB Mode
and Normal
Mode Sample
Rate sections for
operation
6
CLKIDIV2
CLKODIV2
ACTIVE
0
Core Clock divider select
1 = Core Clock is MCLK divide by 2
0 = Core Clock is MCLK
CLKOUT divider select
1 = CLOCKOUT is MCLK divide by 2
0 = CLOCKOUT is MCLK
Activate Interface
7
0
0001001
0
0
Active Control
1 = Active
0 = Inactive
0001111
8:0
RESET
not reset
Reset Register
Reset Register
Writing 00000000 to register resets
device
Table 23 Register Map Description
Note:
All other bits not explicitly defined in the register table should be set to zero unless specified
otherwise.
PD, Rev 4.5, August 2011
37
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
