Production Data
WM8711BL
The recommended external components required to complete the application are shown in Figure 11.
HPOUT
C1
AGND
R1
AGND
Figure 11 Headphone Output Application Drawing
Recommended values are C1 = 220uF (10V electrolytic), R1 = 47k
C1 forms a DC blocking capacitor to isolate the dc of the HPOUT from the headphones. R1 form a
pull down resistor to discharge C1 to prevent the voltage at the connection to the headphones from
rising to a level that may damage the headphones.
DEVICE OPERATION
DEVICE RESETTING
The WM8711BL contains a power on reset circuit that resets the internal state of the device to a
known condition. The power on reset is applied as DCVDD powers on and released only after the
voltage level of DCVDD crosses a minimum turn off threshold. If DCVDD later falls below a minimum
turn on threshold voltage then the power on reset is re-applied. The threshold voltages and
associated hysteresis are shown in the Electrical Characteristics table.
The user also has the ability to reset the device to a known state under software control as shown in
the table below.
REGISTER
ADDRESS
BIT
LABEL
RESET
DEFAULT
DESCRIPTION
0001111
Reset Register
8:0
not reset
Reset Register
Writing 00000000 to register resets
device
Table 5 Software Control of Reset
When using the software reset. In 3-wire mode the reset is applied on the rising edge of CSB and
released on the next rising edge of SCLK. In 2-wire mode the reset is applied for the duration of the
ACK signal (approximately 1 SCLK period, refer to Figure 21).
PD, Rev 4.2, December 2011
1943
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