Production Data
WM8580
PIN DESCRIPTION
PIN
NAME
TYPE
DESCRIPTION
1
PGND
PVDD
Supply
PLL ground
2
Supply
PLL positive supply
Crystal or CMOS clock input
Crystal output
3
XTI
Digital Input
4
XTO
Digital Output
5
MFP10
MFP9
Digital Output
Multi-Function Pin (MFP) 10. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 9. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 8. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 7. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 6. See Table 1 for details of all MFP pins.
S/PDIF transmitter output.
6
Digital Output
7
MFP8
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Input
8
MFP7
9
MFP6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
SPDIFOP
MFP5
Multi-Function Pin (MFP) 5. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 4. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 3. See Table 1 for details of all MFP pins.
S/PDIF receiver input 1
MFP4
MFP3
SPDIFIN1
CLKOUT
DVDD
Digital Output
PLL or crystal oscillator clock output
Supply
Digital positive supply
DGND
Supply
Digital ground
MUTE
Digital Input/Output
Digital Input
DAC mute-all Input / All-DAC Infinite Zero Detect (IZD) flag output
Primary Audio Interface (PAIF) receiver data input 1
Primary Audio Interface (PAIF) receiver data input 2
Primary Audio Interface (PAIF) receiver data input 3
Primary Audio Interface (PAIF) receiver left/right word clock
Primary Audio Interface (PAIF) receiver bit clock
System Master clock; 256, 384, 512, 768, 1024 or 1152 fs
Primary Audio Interface (PAIF) transmitter data output
Primary audio interface transmitter left/right word clock
Multi-Function Pin (MFP) 1. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 2. See Table 1 for details of all MFP pins.
Configures control to be either Software Mode or Hardware Mode
Configures software interface to be either 2-wire or 3-wire. See note 2.
3-wire control interface data output. See note 3.
Control interface data input (and output under 2-wire control)
Control interface clock
DIN1
DIN2
Digital Input
DIN3
Digital Input
PAIFRX_LRCLK
PAIFRX_BCLK
MCLK
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Input
DOUT
PAIFTX_LRCLK
MFP1
MFP2
HWMODE
SWMODE
SDO
Digital Input/Output
Digital Output
SDIN
Digital Input/Output
Digital Input
SCLK
CSB
Digital Input
3-wire control interface latch signal / device address selection
ADC Right Channel Input
AINR
Analogue Input
Analogue Input
Analogue Output
Analogue Output
Supply
AINL
ADC Left Channel Input
ADCREFP
VMID
ADC reference buffer decoupling pin; 10uF external decoupling
Midrail divider decoupling pin; 10uF external decoupling
Analogue ground
AGND
AVDD
Supply
Analogue positive supply
VOUT1L
VOUT1R
VOUT2L
VOUT2R
VREFP
VREFN
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Analogue Input
Analogue Input
DAC channel 1 left output
DAC channel 1 right output
DAC channel 2 left output
DAC channel 2 right output
DAC and ADC positive reference
DAC and ADC ground reference
PD Rev 4.3 August 2007
5
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
