Production Data
WM8326
11 DEVICE DESCRIPTION
11.1 GENERAL DESCRIPTION
The WM8326 is a multi-purpose Power Management device with a comprehensive range of features.
The WM8326 provides 4 DC-DC synchronous buck converters and 11 LDO regulators which are all
programmable to application-specific requirements. The on-board oscillator and two additional LDOs
support the clocking and control functions for the DC-DC converters and other core functions.
The WM8326 provides a 32.768kHz crystal oscillator and secure Real Time Clock (SRTC). An
auxiliary ADC is included, for measurement of external voltages. Other features include flexible GPIO
capability, and LED outputs for system status indications.
Under typical operating conditions, the device is powered up and shut down under the control of the
O¯¯N pin. The device executes a programmable sequence of enabling or disabling the DC-DC
converters, LDOs and other functions when commanded to power up or shut down respectively. An
alternate device state (SLEEP power state) is provided, in which selected functions may be
separately configured for a low-power or other operating condition. The configuration of the normal
operating state may be programmed into an integrated OTP non-volatile memory. If desired, the OTP
memory can be programmed during device manufacture in accordance with the user’s specification.
See Section 14 for details of the OTP and associated bootstrap configuration functions.
In the absence of a main power supply, the WM8326 automatically reverts to a backup state, under
which a minimal functionality is maintained to enable a smooth return to normal operation when the
supply is restored. With a backup battery present, the RTC is updated in the backup state, allowing
the main battery to be depleted or changed without loss of RTC function. Without a backup battery, a
small capacitor is sufficient to maintain the RTC (unclocked) for up to 5 minutes.
11.2 POWER STATES
The WM8326 has 6 main power states, which are described below. Different levels of functionality are
associated with each of the power states. Some of the state transitions are made autonomously by
the WM8326 (eg. transitions to/from BACKUP are scheduled according to the available power supply
conditions). Other transitions are initiated as a result of instructions issued over the Control Interface
or as a result of software functions (eg. Watchdog timer) or hardware functions such as the O¯¯N pin.
The valid transitions and the associated conditions are detailed below.
NO POWER - This is the device state when no power is available. All functions are disabled and all
register data is lost.
OFF - This is the device state when power is available but the device is switched off. The RTC is
enabled and the register map contents are maintained. The R¯¯E¯S¯E¯T¯ pin is pulled low in this state.
LDO11 may optionally be enabled in this state; all other DC-DCs and LDOs are disabled (apart from
LDO12, which supports internal functions).
ON - This is the normal operating state when the device is switched on. All device functions are
available in this state.
SLEEP - This is a user-configurable operating state which is intended for a low-power operating
condition. Selected functions may be enabled, disabled or re-configured according to the user’s
requirements. A programmable configuration sequence for the DC-DCs and LDOs is executed on
transition to/from SLEEP mode.
BACKUP - This is the operating state when the PVDD power supply is below the reset threshold of
the device. Typically, this means that the PVDD supply has been removed. All DC-DC converters and
LDO regulators are disabled in this state. The RTC and oscillator and a ‘software scratch’ memory
area can be maintained from the backup supply (if available) in this state. All other functions and
registers are reset in BACKUP. (Note that, for power saving, an ‘unclocked’ mode, in which the RTC
is held constant, may be selected if required.)
PROGRAM - This is a special operating state which is used for programming the integrated OTP
memory with the device configuration data. The settings stored in the OTP define the device
configuration in the ON state, and also the time/sequencing data associated with ON/OFF power
state transitions. See Section 14 for details of the OTP features.
The valid power state transitions are illustrated in Figure 4.
PD, June 2012, Rev 4.0
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
