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WM8325GEFL/V 参数 Datasheet PDF下载

WM8325GEFL/V图片预览
型号: WM8325GEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 254 页 / 1569 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8325  
Production Data  
14 INSTANTCONFIG™ (ICE) AND OTP MEMORY CONTROL  
14.1 GENERAL DESCRIPTION  
The WM8325 is a highly configurable device which can be tailored specifically to the requirements of  
a complex system application. The sequencing and voltage control of the integrated DC-DC  
Converters and LDOs in power-up, shut-down and SLEEP conditions is crucial to the robust operation  
of the application.  
In development, the WM8325 allows designers to modify or experiment with different settings of the  
control sequences by writing to the applicable registers in the OFF state prior to commanding an ‘ON’  
state transition. Configuration settings can also be stored on an external EEPROM and loaded onto  
the WM8325 as required, using the InstantConfig™ EEPROM (ICE) interface.  
For production use, the WM8325 provides an on-chip One-Time Programmable (OTP) memory, in  
which the essential parameters for starting up the device can be programmed. This allows the  
WM8325 to start up and shut down the system with no dependency on any other devices for  
application-specific configuration parameters.  
14.2 ICE AND OTP MEMORY DEFINITION  
An illustration of the WM8325 memory locations is shown in Figure 18. The main Register Map of the  
WM8325 contains a block of data in a ‘Window’ area which is mirrored in the OTP and/or the ICE  
Memory. Data from the external ICE Memory can be loaded into the Window area. Data can be  
transferred from the Window into OTP Memory and also from the OTP Memory into the Window. The  
Window is called the Device Configuration Register Window (DCRW); the data in this Window is  
mirrored in other locations within the WM8325 Register Map.  
WM8325  
Register Map  
Key  
Unique ID  
Factory Set Data  
Power Management  
& Configuration  
Registers  
User Configurable  
ICE Check  
InstantConfig™  
EEPROM (ICE) Memory  
OTP Memory  
00h  
08h  
10h  
18h  
DCRW  
Page 0 Data  
OTP  
Page 0 Data  
00h  
08h  
10h  
18h  
20h  
28h  
ICE  
Page 2  
Data  
DCRW  
Page 1 Data  
OTP  
Page 1 Data  
DCRW  
Page 2 Data  
OTP  
Page 2 Data  
ICE  
Page 3  
Data  
DCRW  
Page 3 Data  
OTP  
Page3 Data  
DCRW  
Page 4 Data  
ICE  
Page 4  
Data  
Note that the recommended external ICE  
memory is arranged in 8-bit words  
Figure 18 ICE and OTP Memory Layout  
PD, February 2012, Rev 4.0  
50  
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