WM8321
Production Data
20 REAL-TIME CLOCK (RTC)
20.1 GENERAL DESCRIPTION
The WM8321 provides a Real Time Clock (RTC) in the form of a 32-bit counter. The RTC uses the
32.768kHz crystal oscillator as its clock source and increments the register value once per second.
(Note that a direct CMOS input may be used in place of the crystal oscillator; both options are
described in Section 13.) To compensate for errors in the clock frequency, the RTC includes a
frequency trim capability.
The RTC is enabled at all times, including when the WM8321 is in the BACKUP state. When required,
the RTC can be maintained via a backup battery in the absence of any other power supply. In the
absence of a backup battery, the RTC contents can be held (unclocked) for a limited period of up to 5
minutes via a 22F capacitor.
The RTC incorporates an Alarm function. The Alarm time is held in a 32-bit register. When the RTC
counter matches the Alarm time, a selectable response will be actioned.
For digital rights management purposes, the RTC includes security features designed to detect
unauthorised modifications to the RTC counter.
20.2 RTC CONTROL
The 32-bit RTC counter value, RTC_TIME is held in two 16-bit registers, R16417 (4021h) and
R16418 (4022h). The value of RTC_TIME is incremented by the WM8321 once per second. On initial
power-up (from the NO POWER state), these registers will be initialised to default values. Once either
of these registers has been written to, the RTC_VALID bit is set to indicate that the RTC_TIME
registers contain valid data.
When RTC registers are updated, the RTC_SYNC_BUSY bit indicates that the RTC is busy. The RTC
registers should not be written to when RTC_SYNC_BUSY = 1.
The RTC_WR_CNT field is provided as a security feature for the RTC. After initialisation, this field is
updated on every write to R16417 (4021h) or to R16418 (4022h). This enables the host processor to
detect unauthorised modifications to the RTC counter value. See Section 20.4 for more details.
For additional security, the WM8321 does not allow the RTC to be updated more than 8 times in a
one-hour period. Additional write attempts will be ignored.
The RTC Alarm time is held in registers R16419 (4023h) and R16420 (4024h). The Alarm function is
enabled when RTC_ALM_ENA is set. When the Alarm is enabled, and the RTC counter matches the
Alarm time, the RTC Alarm Interrupt is triggered, as described in Section 20.3.
If the RTC Alarm occurs in the SLEEP power state, then a WAKE transition request is generated. If
the RTC Alarm occurs in the OFF power state, then an ON transition request is generated. See
Section 11.3 for details.
When updating the RTC Alarm time, it is recommended to disable the Alarm first, by setting
RTC_ALM_ENA = 0. The RTC Alarm registers should not be written to when RTC_SYNC_BUSY = 1.
The RTC has a frequency trim feature to allow compensation for known and constant errors in the
crystal oscillator frequency up to ±8Hz. The RTC_TRIM field is a 10-bit fixed point 2’s complement
number. MSB scaling = -8Hz. To compensate for errors in the clock frequency, this register should be
set to the error (in Hz) with respect to the ideal (32768Hz) of the input crystal frequency.
For example, if the actual crystal frequency = 32769.00Hz, then the frequency error = +1Hz. The
value of RTC_TRIM in this case is 0001_000000.
For example, if the actual crystal frequency = 32763.78Hz, then the frequency error = -4.218750Hz.
The value of RTC_TRIM in this case is 1011_110010.
Note that the RTC_TRIM control register is locked by the WM8321 User Key. This register can only
be changed by writing the appropriate code to the Security register, as described in Section 12.4.
PD, February 2012, Rev 4.0
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
