WM8234
Product Brief
PIN DESCRIPTION
DESCRIPTION
PIN
NAME
Type
Mid reference voltage.
1
VREF2C
Analogue output
This pin must be connected to AGND via a decoupling capacitor.
Reference voltage input/output
2
3
VRLC
Analogue I/O
Lower reference voltage.
VREF3C
Analogue output
This pin must be connected to AGND via a decoupling capacitor.
Upper reference voltage.
4
VREF1C
Analogue output
This pin must be connected to AGND via a decoupling capacitor.
5
6
SEN
SDO
Digital input
Digital output
Digital input
Digital input
Supply
Enables the serial interface when high.
Serial interface data output
Serial interface clock
7
SCK
Serial interface data input
8
SDI
9
LDO2VDD
LDO2GND
LDO2VOUT
Analogue supply
Analogue ground
10
11
Supply
LDO output
Supply
This pin must be connected to AGND via a decoupling capacitor.
Device select 2
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DSLCT2
MCLK
Analogue input
Analogue input
Analogue input
LVDS output
LVDS output
LVDS output
LVDS output
LVDS output
LVDS output
Supply
Master clock
Device select 1
DSLCT1
D5N/OP[9]
D5P/OP[8]
D4N/OP[7]
D4P/OP[6]
DCLKN/OC[2]
DCLKP/OC[1]
DBGND
LVDS Data output 5 – Negative / CMOS output 11
LVDS Data output 5 – Positive / CMOS output 10
LVDS Data output 4 – Negative / CMOS output 9
LVDS Data output 4 – Positive / CMOS output 8
LVDS Clock Output – Negative/ CMOS clock output 2
LVDS Clock Output – Positive/ CMOS clock output 1
Analogue ground
Analogue supply
DBVDD
Supply
LVDS Data output 3 – Negative / CMOS output 5
LVDS Data output 3 – Positive / CMOS output 4
LVDS Data output 2 – Negative / CMOS output 3
LVDS Data output 2 – Positive / CMOS output 2
LVDS Data output 1 – Negative / CMOS output 1
LVDS Data output 1 – Positive / CMOS output 0
Internal use only. Must be connected to AGND.
Clock monitor
D3N/OP[5]
D3P/OP[4]
D2N/OP[3]
D2P/OP[2]
D1N/OP[1]
D1P/OP[0]
HZCTRL
LVDS output
LVDS output
LVDS output
LVDS output
LVDS output
LVDS output
Digital input
Analogue output
Supply
MON
LDO output.
LDO1VOUT
This pin must be connected to AGND via a decoupling capacitor.
Analogue ground
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
LDO1GND
LDO1VDD
TGSYNC
CLK1
Supply
Analogue supply
Supply
Sensor Timing Sync pulse from host
Sensor Timing Output 1
Digital input
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Supply
Sensor Timing Output 2
CLK2
Sensor Timing Output 3
CLK3
Sensor Timing Output 4
CLK4
Sensor Timing Output 5
CLK5
Sensor Timing Output 6
CLK6
Sensor Timing Output 7
CLK7
Sensor Timing Output 8
CLK8
Analogue ground
AGND3
CLK9
Sensor Timing Output 9
Digital output
Digital output
Digital output
Supply
Sensor Timing Output 10
CLK10
CLK11
AGND2
Sensor Timing Output 11
Analogue ground
Product Brief, Rev 3.0, February 2012
5
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