WM8199
Production Data
Test Conditions
AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 32MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
MIN
TYP
MAX
UNIT
CONDITIONS
Programmable Gain Amplifier
Resolution
Gain
8
208
bits
V/V
283 − PGA[7 : 0]
Max gain, each channel
Min gain, each channel
Gain error, each channel
Analogue to Digital Converter
Resolution
GMAX
GMIN
7.43
0.74
1
V/V
V/V
%
16
3
bits
MSPS
V
Speed
16
Full-scale input range
(2*(VRT-VRB))
DIGITAL SPECIFICATIONS
Digital Inputs
High level input voltage
Low level input voltage
High level input current
Low level input current
Input capacitance
VIH
VIL
IIH
0.8 ∗ DVDD2
V
0.2 ∗ DVDD2
V
1
1
µA
µA
pF
IIL
CI
5
Digital Outputs
High level output voltage
Low level output voltage
High impedance output current
Digital IO Pins
VOH
VOL
IOZ
IOH = 1mA
IOL = 1mA
DVDD2 - 0.5
V
V
0.5
1
µA
Applied high level input voltage
Applied low level input voltage
High level output voltage
Low level output voltage
Low level input current
High level input current
Input capacitance
VIH
VIL
VOH
VOL
IIL
0.8 ∗ DVDD2
V
V
0.2 ∗ DVDD2
IOH = 1mA
IOL = 1mA
DVDD2 - 0.5
V
0.5
1
V
µA
µA
pF
µA
IIH
1
CI
5
High impedance output current
Supply Currents
IOZ
1
Total supply current − active
(Three channel mode)
Total supply current − active
(Single channel mode)
72
56
65
49
mA
mA
mA
mA
MCLK = 32Hz
LINEBYLINE = 1
MCLK = 32MHz
Total analogue supply current −
active (Three channel mode)
IAVDD
IAVDD
MCLK = 32MHz
Total analogue supply current −
active (Single channel mode)
LINEBYLINE = 1
MCLK = 32MHz
Digital core supply current,
DVDD1 − active (note 1)
Digital I/O supply current,
DVDD2 − active (note 1)
Supply current − full power down
mode
5
2
mA
mA
µA
MCLK = 32MHz
MCLK = 32MHz
300
Notes:
Digital supply current depends on the capacitive load connected to the WM8199 output pins and the clock rate applied to
MCLK. This data is based on a load of approximately 10pF per output pin and MCLK = 16MHz.
PD Rev 4.3 March 2007
7
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
