WM8198
Production Data
DEVICE CONFIGURATION
REGISTER MAP
The following table describes the location of each control bit used to determine the operation of the
WM8198. The register map is programmed by writing the required codes to the appropriate
addresses via the serial interface.
ADDRESS
<a5:a0>
DESCRIPTION
DEF
RW
BIT
(hex)
b7
b6
b5
b4
PGAFS[0]
0
b3
b2
b1
b0
000001
000010
000011
000100
000101
Setup Reg 1
Setup Reg 2
Setup Reg 3
Software Reset
03
20
1F
00
00
RW
RW
RW
W
PGAMODE
DEL[1]
MODE4
DEL[0]
CHAN[0]
PGAFS[1]
RLCDACRNG
CDSREF [1]
SELPD
VRLCEXT
RLCV[3]
MONO
INVOP
RLCV[2]
CDS
EN
MUXOP[1]
RLCV[1]
MUXOP[0]
RLCV[0]
CHAN[1]
CDSREF [0]
Auto-cycle
Reset
W
000110
000111
Setup Reg 4
00
41
RW
R
FM[1]
FM[0]
INTM[1]
INTM[0]
RLCINT
FME
ACYCNRLC
LINEBYLINE
Revision
Number
001000
001001
001010
001011
001100
Setup Reg 5
Setup Reg 6
Reserved
00
00
00
00
00
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
POSNNEG
VDEL[2]
VDEL[1]
VDEL[0]
VSMPDET
0
0
0
0
SELDIS[3]
SELDIS[2]
SELDIS[1]
SELDIS[0]
0
0
0
0
0
0
0
0
0
0
Reserved
0
Special
HIGHSPEED
Function
100000
100001
100010
100011
100100
100101
100110
100111
101000
101001
101010
101011
DAC Value
(Red)
80
80
80
80
0
RW
RW
RW
W
DAC[7]
DAC[7]
DAC[7]
DAC[7]
DAC[6]
DAC[6]
DAC[6]
DAC[6]
DAC[5]
DAC[5]
DAC[5]
DAC[5]
DAC[4]
DAC[4]
DAC[4]
DAC[4]
DAC[3]
DAC[3]
DAC[3]
DAC[3]
DAC[2]
DAC[2]
DAC[2]
DAC[2]
DAC[1]
DAC[1]
DAC[1]
DAC[1]
DAC[0]
DAC[0]
DAC[0]
DAC[0]
PGA[0]
PGA[0]
PGA[0]
PGA[0]
PGA[1]
PGA[1]
PGA[1]
PGA[1]
DAC Value
(Green)
DAC Value
(Blue)
DAC Value
(RGB)
PGA Gain LSB
(Red)
RW
RW
RW
RW
RW
RW
RW
W
PGA Gain LSB
(Green)
0
PGA Gain LSB
(Blue)
0
PGA Gain LSB
(RGB)
0
PGA Gain
00
00
00
00
PGA[8]
PGA[8]
PGA[8]
PGA[8]
PGA[7]
PGA[7]
PGA[7]
PGA[7]
PGA[6]
PGA[6]
PGA[6]
PGA[6]
PGA[5]
PGA[5]
PGA[5]
PGA[5]
PGA[4]
PGA[4]
PGA[4]
PGA[4]
PGA[3]
PGA[3]
PGA[3]
PGA[3]
PGA[2]
PGA[2]
PGA[2]
PGA[2]
MSBs (Red)
PGA Gain
MSBs (Green)
PGA Gain
MSBs (Blue)
PGA Gain
MSBs (RGB)
Table 5 Register Map
PD Rev 4.0 June 2004
25
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
