WM8195
14-bit 12MSPS CIS/CCD Analogue Front End/Digitiser
DESCRIPTION
The WM8195 is a 14-bit analogue front end/digitiser IC
which processes and digitises the analogue output signals
from CCD sensors or Contact Image Sensors (CIS) at pixel
sample rates of up to 12MSPS.
The device includes three analogue signal processing
channels each of which contains Reset Level Clamping,
Correlated Double Sampling and Programmable Gain and
Offset Adjust functions. Three multiplexers allow single
channel processing. The output from each of these
channels is time multiplexed into a single high-speed 14-bit
analogue-to-digital converter. The digital output data is
available in 14-bit parallel or 8, 7 or 4-bit wide multiplexed
format, with no missing codes.
An internal 4-bit DAC is supplied for internal reference level
generation. This may be used during CDS to reference CIS
signals or during Reset Level Clamping to clamp CCD
signals. Alternatively an external reference level may be
applied. ADC references are generated internally, ensuring
optimum performance from the device.
Using an analogue supply voltage of 5V and a digital
interface supply of either 5V or 3.3V, the WM8195 typically
only consumes 210mW when operating from a single 5V
supply and less than 20µA when in power down mode.
FEATURES
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14-bit ADC
No missing codes guaranteed
12MSPS conversion rate
Low power – 210mW typical
5V single supply or 5V/3.3V dual supply operation
Single or 3 channel operation
Correlated double sampling
Programmable gain (8-bit resolution)
Programmable offset adjust (8-bit resolution)
Programmable clamp voltage
14-bit parallel or 8, 7 or 4-bit wide multiplexed data output
formats
Internally generated voltage references
48-pin TQFP package
Serial or parallel control interface
APPLICATIONS
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Flatbed and sheetfeed scanners
USB compatible scanners
Multi-function peripherals
High-performance CCD sensor interface
BLOCK DIAGRAM
VRLC/VBIAS
VSMP
MCLK
AVDD1-2
DVDD1-3
VRT VRX VRB
w
CL
R
S
V
S
TIMING CONTROL
R
G
B
M
U
X
8
WM8195
VREF/BIAS
OFFSET
DAC
+
PGA
8
OEB
+
I/P SIGNAL
POLARITY
ADJUST
M
U
X
14-
BIT
ADC
DATA
I/O
PORT
OP[0]
OP[1]
OP[2]
OP[3]
OP[4]
OP[5]
OP[6]
OP[7]
OP[8]
OP[9]
OP[10]
OP[11]
OP[12]
OP[13]/SDO
RINP
RLC
M
U
X
CDS
R
G
B
M
U
X
GINP
RLC
CDS
8
+
OFFSET
DAC
PGA
8
+
I/P SIGNAL
POLARITY
ADJUST
BINP
RLC
CDS
8
+
OFFSET
DAC
PGA
8
+
I/P SIGNAL
POLARITY
ADJUST
CONFIGURABLE
SERIAL/
PARALLEL
CONTROL
INTERFACE
SEN/STB
SCK/RNW
SDI/DNA
RLC/ACYC
NRESET
RLC
DAC
4
AGND1-6
DGND1-5
WOLFSON MICROELECTRONICS LTD
w :: www.wolfsonmicro.com
Advanced Information September 2002, Rev 2.0
Copyright
2002
Wolfson Microelectronics Ltd.
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
