WM2639
Production Data
12. SNR, SNRD, THD and SPFDR are measured on a synthesised sinewave at frequency fOUT generated with a sampling frequency fs.
SERIAL INTERFACE
tSUD
X
X
DATA
X
X
D[0-11]
REG
tSUR
REG
tHDR
NCS
NWE
tSUCSWE
tWHWE
tSUWELD
tWLD
NLDAC
Figure 1 Timing Diagram
Test Conditions:
RL = 10kW, CL = 100pF. VDD = 5V±10%, VREF = 2.048V and VDD = 3V±10%, VREF = 1.024V over recommended operating free-air
temperature range (unless noted otherwise)
SYMBOL
tSUCSWE
tSUD
TEST CONDITIONS
MIN
15
10
20
5
TYP
MAX
UNIT
ns
Setup time NCS low before positive NWE edge
Setup time data ready before positive NWE edge
Setup time REG ready before positive NWE edge
Data and REG hold after positive NWE edge
Setup time NWE high before NLDAC low
High pulse width of NWE
ns
tSUR
ns
tHDR
ns
tSUWELD
tWHWE
tWLD
5
ns
20
23
ns
Low pulse width of NLDAC
ns
WOLFSON MICROELECTRONICS LTD
Production Data Rev 1.0 July 1999
6
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
