Production Data
WM2632
DAC A TO H CODE REGISTERS
Addresses 0 to 7 are the DAC registers. Bits D11 (MSB) to D4 (LSB) from these registers are
transferred to the respective DAC when the LOADB input (pin 18) is low. Bits D3 to D0 are unused
and must be set to 0. For instantaneous updating, LOADB can be held low permanently.
CONTROL REGISTER 0
Control register 0 (address 8) is used to select functions that apply to the whole IC, such as Power
Down and Data Input Format.
BIT
D11
X
D10
X
D9 D8 D7 D6 D5
D4
PD
0
D3
DO
0
D2
R1
0
D1
R0
0
D0
IM
0
Function
Default
X
X
X
X
X
X
X
X
X
X
X
X
Table 5 Control Register 0 Map
BIT
PD
DO
R1
R0
IM
DESCRIPTION
0
1
Full device Power Down
DOUT Enable
Normal
Disabled
External
1.024V
Power Down
Enabled
Internal
Int / Ext Reference Select
Internal Reference Select
Input Mode
2.048V
Straight Binary
Two’s Complement
X
Reserved
Table 6 Control Register 0 Functionality
CONTROL REGISTER 1
Control register 1 (address 9) is used to power down individual pairs of DACs and select their settling
time. Powering down a pair of DACs disables their amplifiers and reduces the power consumption of
the device. The settling time in fast mode is typically 1µs. In slow mode, the settling time is typically
3µs and power consumption is reduced.
BIT
D11
X
D10
X
D9 D8 D7 D6 D5
D4
D3
SGH
0
D2
SEF
0
D1
SCD
0
D0
SAB
0
Function
Default
X
X
X
X
PGH PEF PCD PAB
X
X
0
0
0
0
Table 7 Control Register 1 Map
BIT
PXY
SXY
DESCRIPTION
0
1
Power Down DACs X and Y
Normal
Slow
Power Down
Fast
Speed Setting for DACs X and Y
Table 8 Control Register 1 Functionality
DAC PRESET REGISTER
The Preset register (address 10) makes it possible to update all eight DACs at the same time. The
value stored in this register becomes the digital input to all the DACs when the asynchronous PREB
input (pin 5) is driven low. If no data has previously been written to the preset register, all DACs are
set to zero scale.
TWO-CHANNEL REGISTERS
The two-channel registers (addresses 12 to 15) provide a ‘differential output’ function where writing
data to one DAC will automatically write the complement to the other DAC in the pair. For example,
writing a value of 255 to address 12 will set DAC A to full scale and DAC B to zero scale.
WOLFSON MICROELECTRONICS LTD
PD Rev 1.1 April 2001
11