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WM2610CDT 参数 Datasheet PDF下载

WM2610CDT图片预览
型号: WM2610CDT
PDF下载: 下载PDF文件 查看货源
内容描述: 八通道12位,串行输入,电压输出DAC,具有掉电 [Octal 12-bit, Serial Input, Voltage Output DAC with Power Down]
分类和应用:
文件页数/大小: 13 页 / 161 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM2610  
DAC A TO H CODE REGISTERS  
Addresses 0 to 7 are the DAC registers. The data written to these registers is transferred to the  
respective DAC when the LOADB input (pin 18) is low. For instantaneous updating, LOADB can be  
held low permanently.  
CONTROL REGISTER 0  
Control register 0 (address 8) is used to select functions that apply to the whole IC, such as Power  
Down and Data Input Format.  
BIT  
D11  
X
D10  
X
D9 D8 D7 D6 D5  
D4  
PD  
0
D3  
DO  
0
D2  
X
D1  
X
D0  
IM  
0
Function  
Default  
X
X
X
X
X
X
X
X
X
X
X
X
0
0
Table 5 Register Map  
BIT  
DESCRIPTION  
0
1
PD  
Full device Power Down  
DOUT Enable  
Input Mode  
Normal  
Disabled  
Power Down  
Enabled  
DO  
IM  
Straight Binary  
Twos Complement  
X
Reserved  
Table 6 Register Map  
CONTROL REGISTER 1  
Control register 1 (address 9) is used to power down individual pairs of DACs and select their settling  
time. Powering down a pair of DACs disables their amplifiers and reduces the power consumption of  
the device. The settling time in fast mode is typically 1µs. In slow mode, the settling time is typically  
3µs and power consumption is reduced.  
BIT  
D11  
X
D10  
X
D9 D8 D7 D6 D5  
D4  
D3  
SGH  
0
D2  
SEF  
0
D1  
SCD  
0
D0  
SAB  
0
Function  
Default  
X
X
X
X
PGH PEF PCD PAB  
X
X
0
0
0
0
Table 7 Register Map  
BIT  
DESCRIPTION  
Power Down DACs X and Y  
Speed Setting for DACs X and Y  
0
1
PXY  
Normal  
Slow  
Power Down  
Fast  
SXY  
Table 8 Register Map  
DAC PRESET REGISTER  
The Preset register (address 10) makes it possible to update all eight DACs at the same time. The  
value stored in this register becomes the digital input to all the DACs when the asynchronous PREB  
input (pin 5) is driven low. If no data has previously been written to the preset register, all DACs are  
set to zero scale.  
TWO-CHANNEL REGISTERS  
The two-channel registers (addresses 12 to 15) provide a differential outputfunction where writing  
data to one DAC will automatically write the complement to the other DAC in the pair. For example,  
writing a hexadecimal value of FFFF to address 12 will set DAC A to full scale and DAC B to zero  
scale.  
WOLFSON MICROELECTRONICS LTD  
PD Rev 1.0 February 2001  
11  
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