W91330N SERIES
PIN DESCRIPTION
SYMBOL
Column-
Row
18-PIN
20-PIN
I/O
FUNCTION
The keyboard inputs may be used with either the
standard 5 ´ 4 keyboard or the inexpensive single
contact (Form A) keyboard. Electronic input from a
mC can also be used.
1- 4
&
1- 4
&
I
Inputs
15- 18
17- 20
A valid key-in is defined as a single row being
connected to a single column.
7, 8
9
7, 8
9
I, O
O
A built-in inverter provides oscillation with an
inexpensive 3.579545 MHz crystal or ceramic
resonator.
XT, XT
T/P
The T/P MUTE is a conventional CMOS N-channel
open drain output.
MUTE
The output transistor is switched on during dialing
sequence, one-key redial break, and flash break
time. Otherwise, it is switched off.
MODE
13
15
I
Pulling mode pin to VSS places the dialer in tone
mode.
Pulling mode pin to VDD places the dialer in pulse
mode. (10 ppS; 20 ppS for W91331N/W91331AN,
M/B = 40:60)
Floating mode pin places the dialer in pulse mode.
(10 ppS; 20 ppS for W91331N/W91331AN, M/B =
33.3:66.7).
10
12
I
Hook switch input.
HKS
HKS = VDD: On-hook state. Chip in sleeping mode,
no operation.
HKS = VSS: Off-hook state. Chip enabled for normal
operation.
HKS pin is pulled to VDD by internal resistor.
N-channel open drain dialing pulse output.
11
13
O
DP
Flash key will cause DP to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
VDD, VSS
14, 6
16, 6
I
Power input pins.
Publication Release Date: May 1997
- 3 -
Revision A2
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