W90N745CD/W90N745CDG
The 16 bits I²S and MSB-justified format are support, the timing diagram is shown as Figure 6.9.2
L R C L K
L e ft
R ig h t
1
2
3
1
2
B C K
B 2
D A T A
M S B
L S B
M S B
I2 S b u s
L R C L K
L e ft
R ig h t
1
2
3
1
2
B C K
B 3
L S B
D A T A
B 2
M S B B 2
M S B
M S B – J u stifie d fo r m a t
Figure 6.9.2 The format of I²S
The sampling rate, bit shift clock frequency could be set by the control register ACTL_I²SCON.
6.9.2 AC97 Interface
The AC97 interface, called AC-link is supported. For input and output direction, each frame contains a
Tag slot and 12 data slots. However, in the 12 data slots, only 4 slots are used in W90N745, other 8
slots are not supported, and the control data and audio data are transferred in the 4 valid slots. Each
slot contains 20 bits data.
The interface signals are shown as Figure 6.9.3
SYNC
BCLK
Audio
Audio
DIN
Codec
Controller
DOUT
RESETB
Figure 6.9.3 The interface signal of AC-link
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