W90N745CD/W90N745CDG
USB Endpoint C Control Register (EPC_CTL)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
EPC_CTL
0xFFF06084
R/W
USB endpoint C control register
0x0000_0000
31
23
30
22
29
21
28
27
19
26
18
25
24
16
Reserved
20
17
9
Reserved
15
7
14
6
13
5
12
11
10
8
Reserved
4
3
2
1
0
Reserved
EPC_ZERO
EPC_STL_CLR
EPC_THRE
EPC_STL
EPC_RDY
EPC_RST
EPC_EN
BITS
[31:7]
[6]
DESCRIPTIONS
Reserved
EPC_ZERO
Send zero length packet back to HOST
Clear the Endpoint C stall(WRITE ONLY)
Endpoint C threshold (only for ISO)
[5]
EPC_STL_CLR
1: once available space in FIFO over 16 bytes, DMA accesses
memory
[4]
EPC_THRE
0: once available space in FIFO over 32 bytes, DMA accesses
memory
[3]
[2]
[1]
[0]
EPC_STL
EPC_RDY
EPC_RST
EPC_EN
Set the Endpoint C stall
The memory is ready for Endpoint C to access
Endpoint C reset
Endpoint C enable
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