W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTIONS
The Maximum Frame Length Interrupt high indicates the length
of the incoming packet has exceeded the length limitation
configured in DMARFC register and the incoming packet is
dropped. If the DFOI is high and EnDFO of MIEN register is
enabled, the RxINTR will be high. Write 1 to this bit clears the
DFOI status.
[8]
DFOI
1’b0: The length of the incoming packet doesn’t exceed the length
limitation configured in DMARFC.
1’b1: The length of the incoming packet has exceeded the length
limitation configured in DMARFC.
The More Missed Packet Interrupt high indicates the MPCNT,
Missed Packet Count, has overflow. If the MMP is high and
EnMMP of MIEN register is enabled, the RxINTR will be high.
Write 1 to this bit clears the MMP status.
[7]
MMP
1’b0: The MPCNT has not rolled over yet.
1’b1: The MPCNT has rolled over yet.
Runt Packet Interrupt
The RP high indicates the length of the incoming packet is less
than 64 bytes and the packet is dropped. If the ARP of MCMDR
register is set, the short packet is regarded as a good packet and
RP will not be set.
[6]
RP
If the RP is high and EnRP of MIEN register is enabled, the
RxINTR will be high. Write 1 to this bit clears the RP status.
1’b0: The incoming frame is not a short frame or S/W wants to
receive a short frame.
1’b1: The incoming frame is a short frame and dropped.
The Alignment Error Interrupt high indicates the length of the
incoming frame is not a multiple of byte.
If the ALIE is high and EnALIE of MIEN register is enabled, the
RxINTR will be high. Write 1 to this bit clears the ALIE status.
[5]
ALIE
1’b0: The frame length is a multiple of byte.
1’b1: The frame length is not a multiple of byte.
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