W83697HF/F
3.2
Register Descriptions
There are several status, data, and control registers in W83697HF. These registers are defined below:
ADDRESS
REGISTER
OFFSET
READ
WRITE
base address + 0
base address + 1
base address + 2
base address + 3
base address + 4
base address + 5
base address + 7
SA REGISTER
SB REGISTER
DO REGISTER
TD REGISTER
TD REGISTER
MS REGISTER
DR REGISTER
DT (FIFO) REGISTER
DI REGISTER
DT (FIFO) REGISTER
CC REGISTER
3.2.1
Status Register A (SA Register) (Read base address + 0)
This register is used to monitor several disk interface pins in PS/2 and Model 30 modes. In PS/2 mode,
the bit definitions for this register are as follows:
2
1
7
6
5
4
3
0
DIR
WP
INDEX
HEAD
TRAK0
STEP
DRV2
INIT PENDING
INIT PENDING (Bit 7):
This bit indicates the value of the floppy disk interrupt output.
(Bit 6):
DRV2#
0
A second drive has been installed
1
A second drive has not been installed
STEP (Bit 5):
This bit indicates the complement of STEP# output.
(Bit 4):
TRAK0#
This bit indicates the value of TRAK0# input.
Publication Release Date: Feb. 2002
Revision 0.70
- 34 -
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