W25Q80BV
7. BLOCK DIAGRAM
SFDP Register
Security Register 1 - 3
000000h
0000FFh
003000h
002000h
001000h
0030FFh
0020FFh
0010FFh
Block Segmentation
0FFF00h
•
0F0000h
0FFFFFh
•
0F00FFh
xxFF00h
•
xxFFFFh
•
Block 15 (64KB)
Sector 15 (4KB)
Sector 14 (4KB)
Sector 13 (4KB)
xxF000h
xxF0FFh
xxEF00h
•
xxEFFFh
•
xxE000h
xxE0FFh
xxDF00h
•
xxDFFFh
•
xxD000h
xxD0FFh
•
•
•
•
•
•
xx2F00h
•
xx2000h
xx2FFFh
•
xx20FFh
Sector 2 (4KB)
Sector 1 (4KB)
Sector 0 (4KB)
08FF00h
•
080000h
08FFFFh
•
0800FFh
xx1F00h
•
xx1000h
xx1FFFh
•
xx10FFh
Block 8 (64KB)
Block 7 (64KB)
xx0F00h
•
xx0FFFh
•
07FF00h
•
07FFFFh
•
xx0000h
xx00FFh
070000h
0700FFh
•
•
•
Write Control
Logic
/WP (IO2)
04FF00h
•
040000h
04FFFFh
•
0400FFh
Block 4 (64KB)
Block 3 (64KB)
Status
Register
03FF00h
•
03FFFFh
•
030000h
0300FFh
•
•
•
High Voltage
Generators
00FF00h
•
000000h
00FFFFh
•
0000FFh
Block 0 (64KB)
/HOLD (IO3)
CLK
Page Address
Latch / Counter
Beginning
Page Address
Ending
Page Address
SPI
Command &
Control Logic
/CS
Column Decode
And 256-Byte Page Buffer
Data
DI (IO0)
DO (IO1)
Byte Address
Latch / Counter
Figure 2. W25Q80BV Serial Flash Memory Block Diagram
Publication Release Date: October 06, 2010
Revision D
- 9 -
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