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W25Q20BWZPIG 参数 Datasheet PDF下载

W25Q20BWZPIG图片预览
型号: W25Q20BWZPIG
PDF下载: 下载PDF文件 查看货源
内容描述: 具有双路和四路SPI 1.8V 2M位串行闪存 [1.8V 2M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 70 页 / 2014 K
品牌: WINBOND [ WINBOND ]
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Byte 3  
Byte 1 Byte 2  
Figure 15b. Word Read Quad I/O Instruction Sequence (Previous instruction set M5-4 = 10)  
Word Read Quad I/O with “8/16/32/64-Byte Wrap Around”  
The Word Read Quad I/O instruction can also be used to access a specific portion within a page by  
issuing a “Set Burst with Wrap” command prior to E7h. The “Set Burst with Wrap” command can either  
enable or disable the “Wrap Around” feature for the following E7h commands. When “Wrap Around” is  
enabled, the data being accessed can be limited to either a 8, 16, 32 or 64-byte section of a 256-byte  
page. The output data starts at the initial address specified in the instruction, once it reaches the ending  
boundary of the 8/16/32/64-byte section, the output will wrap around to the beginning boundary  
automatically until /CS is pulled high to terminate the command.  
The Burst with Wrap feature allows applications that use cache to quickly fetch a critical address and then  
fill the cache afterwards within a fixed length (8/16/32/64-byte) of data without issuing multiple read  
commands.  
The “Set Burst with Wrap” instruction allows three “Wrap Bits”, W6-4 to be set. The W4 bit is used to  
enable or disable the “Wrap Around” operation while W6-5 are used to specify the length of the wrap  
around section within a page. See 8.2.18 for detail descriptions.  
Publication Release Date: January 25, 2011  
- 33 -  
Preliminary - Revision B  
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