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I1750PYIR 参数 Datasheet PDF下载

I1750PYIR图片预览
型号: I1750PYIR
PDF下载: 下载PDF文件 查看货源
内容描述: [Speech Synthesizer With RCDG, 100s, PDIP28, 0.600 INCH, LEAD FREE, PLASTIC, DIP-28]
分类和应用: 光电二极管商用集成电路
文件页数/大小: 24 页 / 382 K
品牌: WINBOND [ WINBOND ]
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ISD1700 SERIES  
9 ELECTRICAL CHARACTERISTICS  
9.1 DC PARAMETERS  
PARAMETER  
Supply Voltage  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
Record Current  
SYMBOL  
VDD  
MIN  
2.4  
VSS-0.3  
0.7xVDD  
VSS-0.3  
0.7xVDD  
TYP [1]  
MAX  
5.5  
0.3xVDD  
VDD  
0.3xVDD  
VDD  
UNITS  
V
CONDITIONS  
VIL  
V
VIH  
V
VOL  
V
IOL = 4.0 mA[2]  
IOH = -1.6 mA[2]  
VOH  
V
IDD_Record  
IDD_Playback  
IDD_Erase  
ISB  
20  
20  
20  
1
mA  
mA  
mA  
µA  
µA  
µA  
kꢀ  
kꢀ  
mV  
V
VDD = 5.5 V, No load,  
Sampling freq = 12 kHz  
Playback Current  
Erase Current  
[3] [4]  
Standby Current  
Input Leakage Current  
Input Current Low  
10  
±1  
-10  
IILPD1  
IILPD2  
Force VDD  
-3  
Force VSS , others at Vcc  
Power-up AGC  
When active  
Preamp Input Impedance RMIC+,RMIC-  
7
42  
AnaIn Input Impedance  
MIC Differential Input  
AnaIn Input Voltage  
RAnaIn  
VIN1  
VIN2  
AMSP  
15  
6
300  
1
40  
Peak-to-Peak[5]  
Peak-to-Peak  
Gain from MIC to SP+/-  
dB  
VIN = 15~300 mV, AGC =  
4.7 µF, VCC = 2.4V~5.5V  
Speaker Output Load  
AUX Output Load  
Speaker Output Power  
RSPK  
RAux  
Pout  
8
5
Across both Speaker pins  
When active  
kꢀ  
1Vp-p,  
670  
313  
117  
49  
mW  
mW  
mW  
mW  
V
VDD = 5.5 V  
VDD = 4.4 V  
VDD= 3 V  
1 kHz sine  
wave at  
AnaIn. RSPK  
= 8 .  
VDD= 2.4 V  
Speaker Output Voltage  
VOUT1  
VDD  
RSPK = 8(Speaker),  
Typical buzzer  
AUX Output Swing  
AUX Output DC Level  
AUD  
VOUT2  
VOUT3  
IAUD  
1
V
V
mA  
dB  
Peak-to-Peak  
1.2  
-3.0  
0 to -28  
When active  
VDD =4.5 V, REXT= 390 ꢀ  
Volume Output  
AVol  
8 steps of 4dB each  
reference to output  
Total Harmonic Distortion THD  
1
%
15 mV p-p 1 kHz sine  
wave, Cmessage  
weighted  
[1]  
Notes:  
Conditions: VCC = 4.5V, 8 kHz sampling frequency and TA = 25°C, unless otherwise stated.  
LED output during Record operation.  
VCCA, VCCD and VCCP are connected together. VSSA, VSSP1, VSSP2 and VSSD are connected together.  
[2]  
[3]  
[4]  
[5]  
REC , PLAY , FT , FWD , ERASE , VOL and RESET must be at VCCD  
.
Balanced input signal applied between MIC+ and MIC- as shown in the applications example. Single-ended MIC+ or  
MIC- input is recommended no more than 150 mV p-p.  
- 14 -  
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