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WCMS0808C1X-NF70 参数 Datasheet PDF下载

WCMS0808C1X-NF70图片预览
型号: WCMS0808C1X-NF70
PDF下载: 下载PDF文件 查看货源
内容描述: 32Kx8静态RAM [32Kx8 Static RAM]
分类和应用:
文件页数/大小: 10 页 / 220 K
品牌: WEIDA [ WEIDA SEMICONDUCTOR, INC. ]
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S0808C1X
WCMS0808C1X
32Kx8 Static RAM
Features
• Low Voltage Range
4.5V–5.5V Operation
• Low active power
— 275 mW (max.)
• Low standby power
28
µW
(max.)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
LOW output enable (OE) and three-state drivers. This device
has an automatic power-down feature, reducing the power
consumption
by
99.9%
when
deselected.
The
WCMS0808C1X is in the standard 450-mil-wide (300-mil body
width) SOIC and packages.
An active LOW write enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE and WE inputs
are both LOW, data on the eight data input/output pins (I/O
0
through I/O
7
) is written into the memory location addressed by
the address present on the address pins (A
0
through A
14
).
Reading the device is accomplished by selecting the device
and enabling the outputs, CE and OE active LOW, while WE
remains inactive or HIGH. Under these conditions, the con-
tents of the location addressed by the information on address
pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
Functional Description
The WCMS0808C1X is a high-performance CMOS static
RAM organized as 32K words by 8 bits. Easy memory expan-
sion is provided by an active LOW chip enable (CE) and active
Logic Block Diagram
Pin Configurations
Narrow SOIC
Top View
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A
4
A
3
A
2
A
1
OE
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
INPUTBUFFER
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
CE
WE
OE
A
14
A
13
A
12
A
11
A
1
A
0
ROW DECODER
I/O
0
I/O
1
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
512x512
ARRA
Y
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
OE
A
1
A
2
A
3
A
4
WE
V
CC
A
5
A
6
A
7
A
8
A
9
A
10
A
11
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
TSOP I
Top View
(not to scale)
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
14
A
13
A
12