PCMCIA Flash Memory Card
FLV Series
White Electronic Designs
BLOCK DIAGRAM
Device Pair (N/2 - 1)
CSn
Device (N-1)
Device (N-2)
Array
Address
Bus
ADDRESS
BUFFER
ADDRESS BUS
A1-A25
Control
Address
Bus
M Res
WE
OE
WL
RL
Control Logic
PCMCIA Interface
WH
RH
CE2
CE1
Cn
C0
CSn
REG
A0
WP
Device Pair 1
Device 3
Device 1
Device 2
Device 0
CS1
CS0
At/Reg enable
Ctrl
SR Clr
Reg Clr
SR
PD
CS0
Device Pair 0
Card
Management
Registers
4000h
0000h
Vcc
WH RH
WL RL
DATA
BUS
DATA
BUS
Vcc
attrib. mem
CIS
EEPROM 2kB
Q8-Q15
Q0-Q7
control
Q0-Q7
Vcc
I/O buffer
DATA
BUS
D0-D7
DATA
BUS
Device type
28F008SC
28F016SC
Manuf ID
89H
Device ID
A6H
D8-D15
89H
AAH
REGISTERS IN ATTRIBUTE MEMORY SPACE*
CSR
CONFIGURATION STATUS REGISTER: ADRS = 4002h WRITE ONLY
ADDRESS
4100h
REGISTER NAME
Not Supported
D6D5 D4
PDwn Not Supported
D2 D1 D0
Status Register
D7
D2
D3
4002h
Configꢀ and Status Register
Configuration Option Register
4000h
Power Down, active High
1 = Place all memory devices in power down mode
0 = Normal Operation Power On default = 0
* FLV51- FLV58 and cards without Attribute
Memory do not have registersꢀ
SR
COR
STATUS REGISTER: ADRS = 4100h READ ONLY
CONFIGURATION OPTION REGISTER: ADRS = 4000h WRITE ONLY
Not Supported
D7 D6
SReset
PDwn
Not Supported R/BSY
D2 D1 D0
SRES
LREQ
D6D5
Configuration Index
D5
D4
D3
D7
D4
D3
D2
D1
D0
D5
Represents the state of SRESET bit in COR (4000h)
1 = Reset
D7
Soft Reset, active High
1 = Reset State
0 = Normal Operation
0 = End Reset State
Power On default D5 = 0
D6Level
Req
(not
supported)
D3
D0
Represents the state of Power Down bit (D2) in CSR (4002h)
1 = Power Down
D5-D0 Configuration index (not supported)
Reflects the card's Ready/Busy signal (pin 16) driven by
memory components Ready/Busy outputsꢀ This bit allows
software polling of the card's Ready/Busy statusꢀ
1 = Ready
White Electronic Designs Corporation Marlborough, MA (508) 485-4000
2
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
