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7P002FLG1602I20 参数 Datasheet PDF下载

7P002FLG1602I20图片预览
型号: 7P002FLG1602I20
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash Card, 1MX16, 200ns, CARD-68]
分类和应用: 内存集成电路
文件页数/大小: 11 页 / 344 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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White Electronic Designs
Symbol
A
0
- A
25
Type
INPUT
Name and Function
PCMCIA Flash Memory Card
FLG Series
CARD SIGNAL DESCRIPTION
ADDRESS INPUTS:
A
0
through A
25
enable direct addressing of up to 64MB of memory on the card. Signal A
0
is not used in
word access mode. The memory will wrap at the card density boundary (see PINOUT, note 3). The system should not try to
access memory beyond the card density. A
25
is the most significant bit. A
23
- A
25
are not connected.
DATA INPUT/OUTPUT:
DQ
0
THROUGH DQ
15
constitute the bi-directional databus. DQ
0
- Dq
7
constitute the lower (even) byte
and DQ
8
- DQ
15
the upper (odd) byte. DQ
15
is the MSB.
CARD ENABLE 1 AND 2:
CE
1
enables even byte accesses, CE
2
enables odd byte accesses. Multiplexing A
0
, CE
1
and CE
2
allows 8-bit hosts to access all data on DQ
0
- DQ
7
.
OUTPUT ENABLE:
Active low signal gating read data from the memory card.
DQ
0
- DQ
15
CE
1#
, CE
2#
OE#
INPUT/OUTPUT
INPUT
INPUT
WE#
RDY/BSY#
CD
1#
, CD
2#
WP
INPUT
N.C.
OUTPUT
OUTPUT
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or program algorithms. This signal is not
connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals are connected to ground internally on the memory
card. The host shall monitor these signals to detect card insertion (pulled-up on host side).
WRITE PROTECT:
Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write
protected, providing internal hardware write lockout to the Flash array.If card does not include optional write protect switch, this
signal will be pulled low internally indicating write protect = “off”.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages 12.0V for lower byte (D
0
- D
7
) memory components.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages 12.0V for lower byte (D
8
- D
15
) memory components.
V
PP
1
V
PP
2
V
CC
GND
REG#
RST#
WAIT#
BVD
1
, BVD
2
VS
1
, VS
2
RFU
CARD POWER SUPPLY:
5.0V
CARD GROUND
INPUT
N.C.
OUTPUT
OUTPUT
OUTPUT
ATTRIBUTE MEMORY SELECT : Active low signal, enables access to Attribute Memory Plane, occupied
by Card Information Structure and Card Registers.
RESET:
Active high signal for placing card in Power-on default state. This signal is not connected.
WAIT:
This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card’s V
CC
requirements. VS
1
and VS
2
are open to indicate a 5V card has
been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left floating
N.C.
READ function
Function Mode
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
WRITE function*
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
FUNCTIONAL TRUTH TABLE
Common Memory
REG#
X
H
H
H
H
X
H
H
H
H
Attribute Memory
REG#
X
L
L
L
L
X
L
L
L
L
CE
2#
H
H
H
L
L
H
H
H
L
L
CE
1#
H
L
L
L
H
H
L
L
L
H
A
0
X
L
H
X
X
X
L
H
X
X
OE#
X
L
L
L
L
X
H
H
H
H
WE#
X
H
H
H
H
X
L
L
L
L
D
15
-D
8
High-Z
High-Z
High-Z
Odd-Byte
Odd-Byte
X
X
X
Odd-Byte
Odd-Byte
D
7
-D
0
High-Z
Even-Byte
Odd-Byte
Even-Byte
High-Z
X
Even-Byte
Odd-Byte
Even-Byte
X
D
15
-D
8
High-Z
High-Z
High-Z
Not Valid
Not Valid
X
X
X
X
X
D
7
-D
0
High-Z
Even-Byte
Not Valid
Even-Byte
High-Z
X
Even-Byte
X
Even-Byte
X
* Require proper programming voltages (V
pp
1, V
pp
2). Program or Erase with an invalid V
pp
should not be attempted.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com