REVISIONS
LTR
A
B
C
DESCRIPTION
Changes in accordance with NOR 5962-R159-97.
Change to Table I; I
CCDR
, device type column. Updated boilerplate.
ksr
Correct E2 dimension on package X from 3.85 min and 3.95 max to
.385 min and .395 max inches. Change the I
OL
test condition for V
OL
from 8 mA to 6 mA in Table I. Updated boilerplate. ksr
DATE (YR-MO-DA)
96-12-20
98-02-18
APPROVED
Raymond Monnin
Raymond Monnin
04-10-27
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
C
15
C
16
C
17
C
18
REV
SHEET
C
19
C
20
C
21
C
1
C
22
C
2
C
23
C
3
C
4
C
5
C
6
C
7
C
8
C
9
C
10
C
11
C
12
C
13
C
14
PREPARED BY
Gary L. Gross
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Jeff Bowling
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
96-05-17
REVISION LEVEL
C
MICROCIRCUIT, MEMORY,
DIGITAL, 256K X 16 STATIC
RANDOM ACCESS MEMORY
(SRAM), MONOLITHIC
SILICON
SIZE
A
SHEET
1 OF
23
5962-E010-05
CAGE CODE
67268
5962-96795
DSCC FORM 2233
APR 97
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
