TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
Group A
subgroups
Device
types
Limits
Min
Unit
-55°C ≤ T ≤+125°C
C
Max
unless otherwise specified
Write/Erase/Program AC characteristics controlled - Continued.
Address setup time
Data hold time
tAS
tDH
tDS
See figure 6
See figure 6
See figure 6
9,10,11
9,10,11
9,10,11
All
All
0
0
ns
ns
ns
Data setup time
01,02
03,04
05
50
45
40
Address hold time
tAH
See figure 6
See figure 6
9,10,11
01,02
03,04
05
50
45
45
ns
Chip select pulse width high
Chip erase time
tCPH
9,10,11
9,10,11
9,10,11
9,10,11
All
All
All
All
20
ns
s
120
30
Sector erase time
s
Programming time
50
s
1/ Unless otherwise specified, 4.5 V dc ≤ V
≤ 5.5 V dc and V = 0 V.
SS
CC
2/ Unless otherwise specified, the DC test conditions are as follows:
Input pulse levels: V = V - 0.3 V and V = 0.3V.
IH CC IL
Unless otherwise specified, the AC test conditions are as follows:
Input pulse levels: V = 0 V and V = 3.0 V.
IL
IH
Input rise and fall times: 5 nanoseconds.
Input and output timing reference levels: 1.5 V.
Output load circuit as specified in figure 7.
3/ Parameters shall be tested as part of design characterization and after any design or process changes which may affect
these parameters. Parameters shall be guaranteed to the limits specified in table I for all lots not specifically tested.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-94612
A
REVISION LEVEL
SHEET
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
J
10
DSCC FORM 2234
APR 97
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
