TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
Group A
subgroups
Device
types
Limits
Min
Unit
-55°C ≤ T ≤+125°C
C
Max
unless otherwise specified
Read cycle AC timing characteristics
Read cycle time
tRC
See figure 4
9,10,11
9,10,11
9,10,11
01
02
03
04
05
150
120
90
70
60
ns
Address access time
Chip select access time
tACC
See figure 4
See figure 4
01
02
03
04
05
150
120
90
70
60
ns
ns
tCE
01
02
03
04
05
150
120
90
70
60
Output enable to output valid
Output hold from address,
tOE
See figure 4
See figure 4
9,10,11
9,10,11
01
02
03,04
05
55
50
35
30
ns
ns
tOH
All
0
CS or OE change,
whichever is first
Write/Erase/Program AC timing characteristics WE controlled
Write cycle time
tWC
See figure 5
9,10,11
01
02
03
04
05
150
120
90
70
60
ns
Chip select setup time
tCS
See figure 5
See figure 5
9,10,11
9,10,11
All
0
ns
ns
Write enable pulse width
tWP
01,02
03,04
05
50
45
40
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-94612
A
REVISION LEVEL
SHEET
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
J
8
DSCC FORM 2234
APR 97
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
