TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TC ≤ +125°C
Group A
subgroups
Device
types
Limits
Unit
VSS = 0 V dc
Min
Max
+4.5 V dc ≤ VCC ≤ +5.5 V dc
unless otherwise specified
WRITE CYCLE AC TIMING - Continued.
Write to output 3/
in high impedance
tWHZ
See figure 5
9,10,11
01,02
03-06
12,13
07,14
08,15
09,16
10,11
17,18
35
25
25
20
15
12
10
10
ns
Address hold time
tAH
See figure 5
See figure 5
9,10,11
9,10,11
01-04
5
ns
ns
05-18
01-04
0
5
4
Output active from end of
write
tOW
05,06,
07,12,
13,14
08,09,
10,11,
15,16,
17,18
3
0
Data hold time
tDH
See figure 5
9,10,11
All
ns
1/ Unless otherwise specified, the AC test conditions are as follows:
Input pulse levels: V = 0 V and V = 3.0 V
IL
IH
Input rise and fall times: 5 nanoseconds
Input and output timing reference level: 1.5 V, ±0.5 V
Output loading: see figure 7.
2/ Due to the nature of the 4 transistor design of the die used in these device types, topologically pure testing is important,
particularly for high reliability applications. The device manufacturer should be consulted concerning their testing
methods and algorithms.
3/ Guaranteed by design, but not tested.
SIZE
STANDARD
5962-93187
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
L
11
DSCC FORM 2234
APR 97
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
