TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
READ CYCLE AC TIMING - Continued.
Address access time
tAA
See figure 4
9,10,11
01
02
03
04
05
06
07
08
09
120
100
85
70
55
45
35
25
20
ns
Output hold from address
change
tOH
See figure 4
See figure 4
9,10,11
9,10,11
01-04
05-09
5
3
ns
ns
Chip select access time
tACS
01
02
03
04
05
06
07
08
09
120
100
85
70
55
45
35
25
20
Output enable to output
valid
tOE
See figure 4
9,10,11
01,02
03
04
05
06
60
55
50
40
35
25
10
ns
07
08,09
Chip select to output in
low impedance
tCLZ
See figure 4
See figure 4
9,10,11
9,10,11
01-03
04,05
06-09
10
5
3
ns
ns
Output enable to output in
low impedance
tOLZ
01-04
05-09
5
0
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
7
DSCC FORM 2234
APR 97
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
