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SCA3000-E05-25 参数 Datasheet PDF下载

SCA3000-E05-25图片预览
型号: SCA3000-E05-25
PDF下载: 下载PDF文件 查看货源
内容描述: [Analog Circuit]
分类和应用:
文件页数/大小: 45 页 / 1038 K
品牌: VTI [ VTI TECHNOLOGIES ]
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SCA3000 Series
Table 2. Available measurement modes for SCA3000.
Available measurement
modes
Default after power-on
or reset
Optional measurement
mode 1
Optional measurement
mode 2
SCA3000-D01
SCA3000-D02
Measurement
mode
Bypass
measurement
mode
Not available
SCA3000-D03
Measurement
mode
Not available
SCA3000-E01
SCA3000-E02
Measurement
mode
Narrow band
measurement
mode
Not available
SCA3000-E04
Measurement
mode
Narrow band
measurement
mode
Wide band
measurement
mode
SCA3000-E05
Measurement
mode
Narrow band
measurement
mode
Wide band
measurement
mode
SCA3000-L01
Measurement
mode
Bypass
measurement
mode
Not available
Not available
2.2.1.1
Bypass measurement mode
In bypass measurement mode, the signal bandwidth of the SCA3000 is extended by bypassing the
low-pass filter in signal channel. As a result of a wider measurement bandwidth, the noise level is
higher.
2.2.1.2
Narrow band measurement mode
In narrow band measurement mode, the signal bandwidth of the SCA3000 is reduced by increasing
low-pass filtering in signal channel. In addition, the output data rate is halved due to decimation. As
a result of a narrower signal bandwidth, the noise level is lower.
2.2.1.3
Wide band measurement mode
In wide band measurement mode, the SCA3000 signal channel low-pass filtering pass band is
widened. As a result of a wider measurement bandwidth, the noise level is higher.
2.2.2
Usage
The optional measurement modes can be enabled by setting the bits called MODE_BITS in MODE
register to "010" or "001". See section 3.4 for MODE register details.
Acceleration data can be read from data output registers X_LSB, X_MSB, Y_LSB, Y_MSB, Z_LSB
and Z_MSB in all measurement modes. Each of these registers can be read one by one or using
the decrement register read, which is described in section 4.1.3.2 for SPI and 4.2.1.3 for I
2
C
interface. See section 3.3 for output register details.
2.2.2.1
Overflow condition
Since acceleration data registers have no limiter, the possible overflow needs to be detected using
bits [B7, B6, B5]. If bits [B7, B6, B5] are ‘011’ or ‘100’, data overflow has occurred (see Table 3).
This applies for all acceleration output registers (X_LSB … Z_MSB and BUF_DATA).
Table 3. Overflow bit patterns in acceleration data registers (X_LSB … Z_MSB and BUF_DATA).
Byte
MSB byte
Bit number
B7 B6 B5 B4
Acceleration data bit Sign d11 d10 d9
Data overflow on
0
1
1
x
positive acceleration
Data overflow on
1
0
0
x
negative
acceleration
x = ignore
B3
d8
x
x
B2
d7
x
x
B1
d6
x
x
LSB byte
B0 B7 B6
d5 d4 d3
x
x
x
x
x
x
B5
d2
x
x
B4
d1
x
x
B3 B2:B0
d0
x
x
xxx
xxx
In case of overflow, the output register value must be discarded. When an overflow is detected, the
bit pattern ‘0101 1111 1111 1xxx’ is used for positive accelerations and ‘1010 0000 0000 0xxx’ for
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PRELIMINARY - Subject to changes
Doc.Nr. 8257300A.06
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Rev.A.06