SCA3000 Series
Locked
Reg.
type
Conf
Mode
(R, W, RW, IA)
RW, NV
Addr.
21h
Name
Description
INT_MASK
HW interrupt mask register
(configures the operation of
INT-pin):
- interrupt when output
buffer is ¾ full
(enable / disable)
- interrupt when output
buffer is ½ full
(enable / disable)
- mask all interrupts on
INT-pin (enable / disable)
- INT-pin activity (INT
active low / INT active
high)
22h
CTRL_DATA
Data to/from register which RW, NV, IA Conf
address is in CTRL_SEL
(18h) register
x
-
23h ... 3Fh
Reserved
Add. is the register address in hex format.
RW – Read / Write register, R – Read-only register, NV – Register mirrors NV-memory data (NV = non-volatile).
IA – indirect addressing used.
Registers whose read and write access is blocked by register lock is marked in "Locked" column.
3.2 Non-volatile memory
The SCA3000 has an internal non-volatile memory for calibration and configuration data. Memory
content will be programmed during production and is not user configurable. Initial configuration
values can be found in the following section 3.4.
3.3 Output Registers
The SCA3000 output registers (marked with 'Output' in Table 5) contents and bit definitions are
described in this section. Output registers contain information of measured acceleration and
temperature as well as information of the operating state and interrupts of SCA3000.
When reading the output values an MSB register must be read first because MSB register reading
latches the data in to all other acceleration output registers
Address: 04h
Register name: X_LSB, X-axis LSB frame
Initial
Value
00h
Bits
7:0
Mode
R
Name
DATA
Description
X-axis LSB frame
Address: 05h
Register name: X_MSB, X-axis MSB frame
Initial
Value
00h
Bits
7:0
Mode
R
Name
DATA
Description
X-axis MSB frame
Address: 06h
Register name: Y_LSB, Y-axis LSB frame
Initial
Value
00h
Bits
7:0
Mode
R
Name
DATA
Description
Y-axis LSB frame
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Doc.Nr. 8257300A.07
Rev.A.07