Preliminary
VG4632321A
524,288x32x2-Bit
CMOS Synchronous Graphic RAM
VIS
Figure 16.1. Auto Precharge after Read Burst (Burst Length = 4, CAS Latency = 1)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t
CK1
CKE
High
CS
RAS
CAS
WE
DSF
BS
RAx
RBx
CAx
RBz
RBy
A9
RAx CAx
CBy
RBz CBz
CAy RBy
CBx
A0~A8
DQM
DQ
Hi-Z
Bx1
Ax1
Ax2
Bx0
By2 By3
Ax0
Ax3
Bx2
By1
Bz3
Ay0
Bx3
Ay1
Ay3
Bz0
Bz1
Ay2
By0
Bz2
Activate
Command
Bank B
Activate
Command
Bank B
Activate
Command
Bank B
Read with
Activate
Command
Bank A
Auto Precharge
Command
Bank B
Read with
Read
Read with
Read with
Auto Precharge
Command
Bank A
Command
Bank A
Auto Precharge
Command
Bank B
Auto Precharge
Command
Bank B
Document:
Rev.1
Page34