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VG36648041CT 参数 Datasheet PDF下载

VG36648041CT图片预览
型号: VG36648041CT
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS同步动态RAM [CMOS Synchronous Dynamic RAM]
分类和应用:
文件页数/大小: 70 页 / 948 K
品牌: VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
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Preliminary  
VG36648041CT  
CMOS Synchronous Dynamic RAM  
VIS  
DC Characteristics (Recommended Operating Conditions unless otherwise noted)  
VG36648041B  
-8  
Parameter  
Symbol  
ICC1  
Test Conditions  
-7  
Unit Notes  
Min Max Min Max  
Operating current  
Burst length = 1  
One bank active  
CL = 3  
CL = 2  
130  
130  
130  
130  
mA  
1
tRC £ tRC(MIN.), Io = 0mA  
Precharge standby  
current in power  
down mode  
ICC 2P  
2
2
2
2
mA  
mA  
CKE £ VIH(MAX.) CK = 10ns  
t
ICC 2PS  
CKE £ VIH(MAX.) CK  
CKE ³ VIH(MIN.) CK  
CS ³ VIH(MIN.)  
t
= ¥  
Precharge standby current ICC 2N  
in Nonpower down mode  
25  
25  
t
= 10ns.  
Input signals are changed one  
time during 2 CLK cycles.  
ICC 2NS  
10  
10  
CKE ³ VIH(MIN.), tCK = ¥  
CLK £ VIL(MAX.)  
Input signals are stable.  
Active standby current in ICC 3P  
7
5
7
5
mA  
mA  
CKE £ VIL(MAX.), tCK = 10ns  
CKE £ VIL(MAX.), tCK = ¥  
power down mode  
ICC 3PS  
Active standby current in ICC 3N  
Nonpower down mode  
40  
40  
CKE ³ VIH(MAX.), tCK = 10ns  
CS ³ VIH(MIN.)  
Input signals are changed  
one time during 2CLKs.  
ICC 3NS  
20  
20  
CKE ³ VIH(MIN.) CK  
t
= ¥  
CLE £ VIL(MAX.)  
Input signals are stable.  
Operating current  
(Burst mode)  
ICC4  
CL = 3  
CL = 2  
170  
135  
170  
120  
mA  
2
3
tCK ³ tCK(MIN.), Io = 0mA  
All banks Active  
Refresh current  
ICC5  
ICC6  
ILI  
220  
200  
mA  
mA  
mA  
tRC ³ tRC(MIN.)  
CKE £ 0.2V  
0 £ VIN £ VDD(MAX)  
Self refresh current  
1
1
1
1
Input leakage current  
(Inputs)  
-1  
-1  
Pins not under test = 0V  
Output leakage current  
(I/O pins)  
IIL  
-1.5  
1.5  
0.4  
-1.5  
1.5  
0.4  
mA  
0 £ VOUT £ VDD (MAX)  
DQ# in Hi - Z., Dout disabled  
Output Low Voltage  
Output High Voltage  
VOL  
VOH  
IOL = 2mA  
mA  
mA  
4
4
IOH = -2mA  
2.4  
2.4  
Notes :  
1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output  
open. In addition to this, ICC1 is measured on condition that addresses are changed only one  
time during tCK(MIN.)  
.
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output  
open. In addition to this, ICC4 is measured on condition that addresses are changed only one  
time during tCK(MIN.)  
.
3. ICC5 is measured on condition that addresses are changed only one time during tCK(MIN.)  
4. For LVTTL compatible, VG36648041.  
.
Document : 1G5-0153  
Rev.1  
Page5