Preliminary
VG36641641BT
CMOS Synchronous Dynamic RAM
VIS
A. C Characteristics : (Ta = 0 to 70°C V = 3.3V ± 0.3V = 0V)
DD
SS
Test Conditions for LVTTL Compatible :
AC input Levels (VIH/VIL)
2.0/0.8V
1ns
Input timing reference level/
Output timing reference level
1.4V
Input rise and fall time
Output load condition
50pF
1.4V
AC Test Load Circuits (for LVTTL interface) :
V
VDDQ
VOUT
DDQ
50
W
Z = 50
W
Device
Under
Test
50PF
Document : 1G5-0127
Rev2
Page6