VG36644041DT / VG36648041DT / VG36641641DT
CMOS Synchronous Dynamic RAM
VIS
10.BURST Termination
There are two methods to terminate a burst operation other than using a read or a write command. One is the burst
stop command and the other is the precharge command.
10.1 BURST Stop Command
During a read burst, when the burst stop command is issued, the burst read data are terminated and the data bus
goes to high-impedance after the CAS latency from the burst stop command.
During a write burst, when the burst stop command is issued, the burst write data are termained and data bus goes to
Hi-Z at the same clock with the burst stop command.
Burst Termination
Burst lengh=X, CAS Intency=2,3
T7
T0
T1
T3
T6
T2
T4
T5
CLK
BST
Read
Command
Hi-Z
CAS latency=2
Q0
Q1
Q0
Q2
Q1
DQ
Hi-Z
CAS latency=3
Q2
DQ
Remark BST: Burst stop command
Burst lengh=X, CAS latency=2,3
T7
T0
T1
T3
T6
T2
T4
T5
CLK
BST
Write
Q0
Command
CAS latency=2,3
Hi-Z_
Q0
Q1
Q2
DQ
Remark BST: Burst command
Document :1G5-0177
Rev.2
Page25
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
