VG36128401BT / VG36128801BT / VG36128161BT
CMOS Synchronous Dynamic RAM
VIS
DC Characteristics 1
(Ta = 0 ~ 70°C, V = V
= 3.3± 0.3V, V = V = 0V, Ouput Open, unless otherwise noted)
SSQ
DD
DDQ
SS
Limits (max.)
Parameter
Symbol
ICC1
Test Conditions
Organization
Unit Notes
-7H
100
110
130
-7L
95
-8H
95
Operating current
One bank active
tRC = tRC(MIN), tCLK = tCLK(MIN)
BL = 1, CL=3
x4
x8
,
100
120
100
120
mA
1
x16
Precharge standby current ICC2
in power down mode
P
x4/x8/x16
x4/x8/x16
2
1
2
1
2
1
CKE £ VIL(MAX), CK = 15ns
t
mA
mA
ICC2PS
CKE £ VIL(MAX), CLK £ VIL(MAX)
Precharge standby current ICC2
in non power down mode
N
CS ³ VCC - 0.2V
tCK = 15ns, CKE ³ VIH(MIN)
x4/x8/x16
25
15
30
20
25
15
30
20
25
15
30
20
2
ICC2NS
CS ³ VCC - 0.2V
CLK £ VIL(MAX), CKE ³ VIH(MIN)
x4/x8/x16
x4/x8/x16
x4/x8/x16
mA
mA
mA
All input signals are stable.
Active standby current in
Nonpower down mode
ICC3N
CS ³ VCC - 0.2V
tCK = 15ns, CKE ³ VIH(MIN)
2
ICC3NS
CS ³ VCC - 0.2V
CLK £ VIL(MAX), CKE ³ VIH(MIN)
All input signals are stable.
Operating current
(Burst mode)
ICC4
All banks active
tCK = tCK(MIN), BL=4, CL=3
x4
x8
140
150
160
160
2
110
120
130
160
2
110
120
130
160
2
mA
All banks active
x16
ICC5
ICC6
tRC = tRC(MIN), tCLK = tCLK(MIN)
Refresh current
x4/x8/x16
mA
mA
mA
Self refresh current
3
4
CKE £ 0.2V
x4/x8/x16
0.8
0.8
0.8
NOTES
1. ICC(max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Normal version: VG36128401BT-7H / VG36128801BT-7L / VG36128161BT-8H
4. Low power version: VG36128401BTL-7H / VG3636128401BTL-7L / VG3636128401BTL-8H
DC Characteristics 2
(Ta = 0 ~ 70°C, V = V
= 3.3± 0.3V , V = V = 0V, unless otherwise noted)
SSQ
DD
DDQ
SS
Parameter
Symbol
II (L)
Test Condition
Min
Max
10
Unit
Input leakage current (Inputs)
0
V £ V
IN DD(MAX)
Pins not under test = 0V
£
-10
uA
uA
Output leakage current (I/O pins)
IO (L)
0£ VOUT £ VDD(MAX)
DQ# in H - Z., DOUT is disabled
-10
2.4
10
High level output voltage
Low level output voltage
VOH (DC) IOH = -2mA
VOL (DC) IOL = 2mA
V
V
0.4
Document :1G5-0183
Rev.1
Page6