VIS
DC Characteristics ; 3.3 - Volt Version
(T
a
= 0 to 70°C
,
V
CC
= + 3.3V
±
10 %, V
SS
= 0V)
VG26(V)(S)18165C
1,048,576 x 16 - Bit
CMOS Dynamic RAM
Parameter
Symbol
Test Conditions
VG26(V)(S)18165C
-5
Min
Max
120
Min
-
-6
Max
110
Unit
Notes
Operating current
I
CC1
RAS cycling
LCAS / UCAS cycling
t
RC
= min
LVTTL interface
RAS, LCAS / UCAS = V
IH
Dout = High-Z
CMOS interface
RAS, CAS
≥
V
C C
-0.2V
Dout = High-Z
-
mA
1, 2
Low
power
S-version
I
CC2
-
0.5
-
0.5
mA
-
0.15
-
0.15
mA
Standby
Current
Standard
power
version
LVTTL interface
RAS, LCAS / UCAS = V
IH
Dout = High-Z
CMOS interface
RAS, CAS
≥
V
C C
-0.2V
Dout = High-Z
-
2
-
2
mA
-
0.5
-
0.5
mA
RAS- only refresh current
I
CC3
RAS cycling
LCAS / UCAS = V
IH
t
RC
= min
t
PC
= min
t
RC
= min
RAS, LCAS / UCAS cycling
t
RASS
≥
100µs
Standby: VCC-
0.2V
≤
RAS
CAS before RAS refresh:
2048 cycles / 128ms
RAS, LCAS / UCAS :
0V
≤
V
IL
≤
0.2V
VCC- 0.2V
≤
V
IH
≤
V
IH
(max)
Dout = High-Z, t
RAS
≤
300ns
-
120
-
110
mA
1, 2
EDO page mode current
CAS- before- RAS refresh
current
Self- refresh current
(S-Version)
CAS- before- RAS long
refresh current
(S-Version)
I
CC4
I
CC5
I
CC8
I
CC9
-
-
-
-
90
120
250
300
-
-
-
-
80
110
250
300
mA
mA
µA
µA
1, 3
1, 2
Document:1G5-0147
Rev.1
Page 8
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
