VG26(V)(S)17400FJ
4,194,304 x 4 - Bit
CMOS Dynamic RAM
VIS
DC Characteristics ; 3.3 - Volt Verion
(Ta = 0 to 70°C, VCC = + 3.3V(+10%,-5%), Vss = 0V)
VG26 (V) (S) 17400E
-5 -6
Min Max Min Max
Parameter
Symbol
Test Conditions
Unit Notes
Operating
RAS cycling
current
ICC1
CAS cycling
tRC = min.
-
-
145
0.5
-
-
135 mA
1, 2
Low
power
S - version
LVTTL interface
RAS, CAS = VIH
0.5
mA
mA
Dout = high - Z
CMOS interface
-
0.15
-
0.15
RAS, CAS ³ VCC - 0.2V
Dout = high - Z
Standby
Current
ICC2
Standard
power
version
LVTTL interface
RAS, CAS = VIH
-
-
2
-
-
2
mA
mA
Dout = high - Z
CMOS interface
0.5
0.5
RAS, CAS ³ VCC - 0.2V
Dout = high - Z
RAS - only
refresh current
ICC3
RAS cycling, CAS = VIH
tRC = min.
-
145
-
135
1, 2
mA
mA
Fast page mode
current
ICC4
ICC5
ICC8
ICC9
-
-
100
145
-
-
90
1,3
tPC = min.
CAS - before - RAS
refresh current
tRC = min.
135
1, 2
mA
RAS, CAS cycling
Self - refresh currant
(S - Version)
-
-
250
300
-
-
250
300
tRASS ³ 100mS
mA
CAS - before - RAS
long refresh
current (S - Version)
mA
Standby : VCC - 0.2V £ RAS
CAS before RAS refresh :
2048 cycles/128ms
RAS, RAS : 0V £ VIL £ 0.2V
VCC - 0.2V £ VIH £ VIH (Max)
Dout = high - Z, tRAS £ 300ns
Document :
Rev.
Page8