128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
COMMAND TRUTH TABLE
CKE CKE
COMMAND
MNEMONIC
/CS /RAS /CAS /WE BA0,1 A11 A10 A0-9
n-1
n
DESEL
NOP
H
X
H
L
L
L
L
X
H
L
L
L
X
H
H
H
H
X
H
H
L
X
X
V
V
X
X
X
V
X
X
X
X
V
L
X
X
V
X
X
Deselect
H
H
H
H
X
X
X
X
No Operation
Row Address Entry &
Bank Active
ACT
PRE
Single Bank Precharge
Precharge All Banks
L
H
PREA
WRITE
WRITEA
READ
READA
REFA
REFS
Column Address Entry
&Write
H
X
L
H
L
L
V
V
L
V
Column Address Entry &
Write with Auto-Precharge
H
H
X
X
L
L
H
H
L
L
L
V
V
V
V
H
L
V
V
Column Address Entry
& Read
H
Column Address Entry &
Read with Auto-Precharge
H
H
X
H
L
L
H
L
L
L
H
H
V
X
V
X
H
X
V
X
Auto-Refresh
H
L
L
L
L
H
L
L
X
H
L
X
H
H
X
H
X
X
X
X
X
X
X
X
X
X
X
X
Self-Refresh Entry
H
H
REFSX
Self-Refresh Exit
TBST
MRS
H
H
X
X
L
L
H
H
L
L
L
X
L
X
L
X
L
X
Burst Terminate
L
V*1
Mode Register Set
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE: 1. A7-A9 =0, A0-A6 =Mode Address
JULY.2000
Rev.2.2
Page-6
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
