128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
Read Interrupted by Read @BL=4,CL=2
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
CLK
/CS
tRRD
/RAS
/CAS
/WE
CKE
DQM
A0-8
A10
tRCD
tRCD
X
X
X
0
Y
X
X
X
1
Y
Y
Y
X
X
X
1
A9,11
BA0,1
DQ
0
1
1
0
Q0 Q0 Q0 Q1 Q1 Q1 Q1 Q1 Q0 Q0 Q0 Q0
ACT#0 READ#0
ACT#1
READ#1 READA#1
READ#0
interrupt
interrupt
other
interrupt
ACT#1
same bank other
bank
bank
Italic parameter indicates minimum case
JULY.2000
Rev.2.2
Page-40