VSC8201DL
Method II - RGMII Implementation Using the Internal Clock Delay Feature
In this mode the internal clock delay feature is used i.e. MII Register bit 23.8 is set.
Board Layout
VDDIO=3.0 - 3.6v
VDDIO=3.0 - 3.6v
RXC
RX_CTL
RD3
RD2
RD1
RD0
TD3
MAC
VSC8201
TD2
TD1
TD0
TX_CTL
TXC
700ps of additional trace delay w.r.t TXC
Benefits
•
•
Does not require an external 2.5v supply, thereby reducing system cost.
Does not require any additional delays on the TXC and RXC traces.
Drawbacks
Needs extra board space for the additional trace delays needed on the TD[3:0] and the TX_CTL traces.
•
Rev. 1.6.3 - 9/29/04
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