VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
2.488Gb/s SONET/SDH
Overhead Monitor
VSC8150
Figure 10: Framing and B1 Error Output Timing
T
FPW
RXFPOUT
RXFRERR
RXSEF
T
FERRPW
T
FERRSU
T
SEFSU
T
T
B1PWL
B1PWH
T
B1SU
B1ERR
Note: Waveforms not to scale
Table 6: Framing and B1 Error Output Timing (STS-48/STM-16 Mode)
Parameter
Description
Min
Typ
Max
Units
T
Frame Pulse Width
—
—
—
—
—
—
—
51.4
61.2
25.7
48.3
14
—
—
—
—
—
—
—
ns
ns
ns
ns
µs
ns
ns
FPW
T
Frame Boundary Error delay with respect to RXFPOUT
Frame Boundary Error pulse width high
SEF transition delay time with respect to RXFPOUT
B1 Pulse train delay with respect to RXFPOUT
B1 error pulse width high
FERRSU
FERRPW
T
T
SEFSU
T
B1SU
T
25.7
25.7
B1PWH
T
B1 error pulse width low
B1PWL
Note: Generated Waveforms are synchronous and assume a 2.488GHz RXSCLKIN signal.
Table 7: Framing and B1 Error Output Timing (STS-12/STM-4 Mode)
Parameter
Description
Min
Typ
Max
Units
T
Frame Pulse Width
—
—
—
—
—
—
—
51.4
64.4
51.4
51.4
14
—
—
—
—
—
—
—
ns
ns
ns
ns
µs
ns
ns
FPW
T
Frame Boundary Error delay with respect to RXFPOUT
Frame Boundary Error pulse width high
SEF transition delay time with respect to RXFPOUT
B1 Pulse train delay with respect to RXFPOUT
B1 error pulse width high
FERRSU
FERRPW
T
T
SEFSU
T
B1SU
T
103
103
B1PWH
T
B1 error pulse width low
B1PWL
Note: Generated Waveforms are synchronous and assume a 622MHz RXSCLKIN signal.
Page 10
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52186-0, Rev. 3.0
10/12/98
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
