VITESSE
SEMICONDUCTOR CORPORATION
2.488Gb/s SONET/SDH
Advance Product Information
STS-48/STM-16 Section Terminator
VSC8151
Figure 10: Transmit Frame Pulse Timing Diagram
Transmitted
Frame bytes
E2
E2
E2
Payload bytes of Row 9
TXFPOUT
T
TFPW
B
Table 9: Transmit Frame Pulse Timing
Parameter
Description
Min
Typ
Max
Units
TFPW
Transmit Frame Pulse Width
Transmitted Byte Cycle Time
Transmitted Byte Cycle Time
Transmitted Byte Cycle Time
—
—
—
—
51.2
3.2
—
—
—
—
ns
ns
ns
ns
TB (OC-48)
TB(OC-12)
TB(OC-3)
12.8
51.2
Figure 11: On Chip Register File Access Port Timing Diagram
TXADDR[5:0]
TXOHDATA[7:0]
TXOHWI
TXWRENA
TSU
TH
TWE
TCYC
Table 10: On Chip Register File Access Port Timing
Parameter
Description
Setup time for data/address
Min
Typ
Max
Units
TSU
TH
50
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
Hold time for data/address
Write enable low
TWE
TCYC
50
Write cycle time
375
Page 16
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52225-0, Rev. 2.9
12/1/99
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
