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VSC8124RE 参数 Datasheet PDF下载

VSC8124RE图片预览
型号: VSC8124RE
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, HEAT SINK, CAVITY DOWN, TQFP-100]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 20 页 / 646 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE
SEMICONDUCTOR CORPORATION
Target Specification
VSC8124
Features
• Four Channel 2.488 Gb/s Data Recovery
• SONET Quality Jitter Tolerance
• Fastlock Data Acquisition less than 200
Bit Times
• Loss of Signal Indicators
• Long Strings of Static Data Tolerated by the
Clock Recovery Circuit without Loss of Signal
• First Order Clock Recovery Loop Minimizes
Jitter Accumulation
2.488 Gb/s Quad
Data Re-timer
• Differential on Chip Terminated Serial Data I/O
• Bypass for OC3, OC12 Data Rates
• 155.52 MHz Reference Clock Frequency
• 3.3V Supply Operation
• 14 x 14mm, 100 Pin Thermally Enhanced
TQFP Package
General Description
The VSC8124 is a four channel, 2.5 Gb/s data re-timer for cleaning up data downstream of optical links or
cross point switches. Serial data at the 2.5 Gb/s rate is independently re-timed on four channels, and driven dif-
ferentially by CML drivers. The re-timing function on each channel can be individually bypassed for lower rate
signals or test purposes. The VSC8124 provides four independent loss of signal indicators in the event of loss of
synchronous data transitions.
G52271-0, Rev. 1.14
2/23/00
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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