VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8121
AC Characteristics
Table 2: AC Characteristics
Parameter
T
CLK
RC
d
RC
f
∆f
RC
t
jitter
2.488GHz SONET/SDH
Clock Generator
Description
High-speed output clock period
Reference clock duty cycle
Reference clock frequency (selectable)
Reference clock frequency tolerance
Jitter generation
Min
—
45
—
-100
—
Typ
401.9
—
51.84,
77.76,
or
155.52
—
1.75
Max
—
55
—
+100
3.6
Units
ps
%
MHz
ppm
(1)
ps RMS
Conditions
12kHz to 20MHz.
See Figure 5.
NOTE: (1) ppm refers to “parts per million.” 100ppm (100/1000000) is equivalent to 0.01%. Therefore, the equivalent reference
clock frequency range in MHz for +/-100ppm tolerance is as follows:
RC
f
51.84MHz
77.76MHz
155.52MHz
X 100ppm =
5.184KHz
7.776KHz
15.552KHz
Acceptable Range
51.83MHz to 51.85MHz
77.75MHz to 77.78MHz
155.51MHz to 155.54MHz
Note that +/-100ppm tolerance for reference clock frequency more than accommodates the SONET/SDH requirement that refer-
ence clock-supplying crystals function at +/-20ppm.)
Figure 5: RMS/Peak-to-Peak Jitter (12kHz - 20MHz), REF_CLK freq = 77.76MHz
RMS Jitter
3.0
2.5
2.0
ps
ps
Pk-Pk Jitter
25
20
15
10
5
0
1.5
1.0
0.5
0.0
0
20
40
60
80
100
0
20
40
60
80
100
Case Temperature (deg C)
Case Temperature (deg C)
G52163-0, Rev 4.2
04/16/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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