VITESSE
SEMICONDUCTOR CORPORATION
Target Specification
STS-12/STS-3 Multi Rate
Clock and Data Recovery Unit
VSC8115
Table 6: LVDS Differential Outputs
Parameters
VOCM
Description
Min
1.0
Typ
1.35
Max
1.7
Units
V
Conditions
Common Mode
voltage
100W PAD to
PADN
Differential
Output Swing
100W PAD to
PADN
DVOUT
350
500
750
mV
Table 7: LVPECL Differential Outputs
Parameters
VOCM
Description
Min
1.12
Typ
-
Max
2.0
Units
V
Conditions
Common Mode
voltage
50W to (VDD - 2V)
Differential
Output Swing
400
-
800
mV
DVOUT
50W to (VDD - 2V)
Table 8: LVTTL Inputs
Parameters
Description
Min
Typ
Max
Units
Conditions
VIH
VIL
IIH
Input HIGH voltage
Input LOW voltage
Input HIGH current
Input LOW current
2.0
0
—
—
---
---
VDD
0.8
50
V
V
—
—
-50
-50
mA
mA
VIN = 2.7V, VDD=MAX
VIN = 0.5V, VDD=MAX
IIL
50
Power Dis s ipation
Table 9: Power Supply Currents
Parameter
Description
(Typ)
(Max)
Units
IDD
PD
Power supply current from VDD
Power dissipation
57
80
mA
188.1
277
mW
G52272-0, Rev. 1.1
9/29/00
Page 8
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741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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