VITESSE
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
Mux/Demux and Section Terminator IC Chipset
SEMICONDUCTOR CORPORATION
Datasheet
VSC8025/VSC8026
Figure 11: VSC8026 Frame Detection Patterns
48 bits
24 bits
12 bits
A1 (0xF6)
A1 (0xF6)
A1 (0xF6)
A2 (0x28)
A2 (0x28)
A2 (0x28)
Table 10: VSC8026 Frame Detection Select Settings
Function
SELFRDET1
SELFRDET0
24 bits
48 bits
1
0
0
1
0
1
0
1
12 bits
Frame detection disabled
Figure 12: VSC8026 Functional Block Diagram of Frame Acquisition Circuit
FRDETEN
SEFFRDET1
SELFRDET0
FRERR
SEF
LOF
ERROR/ALARM
DETECTION
RXFPIN
EQULOOP
1
0
FRAME SYNC.
COUNTER
FRAME
DET
RESYNC
OUTA
OUTB
OUTC
OUTD
RXPIN
RXSIN
1
0
BYTE
ALIGN
BYTE
DEINTERLEAVER
1:8
DMX
Page 22
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52182-0, Rev. 4.0
1/5/00