VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
Mux/Demux and Section Terminator IC Chipset
VSC8025/VSC8026
VSC8026 Functional Description
The VSC8026 demultiplexer deserializes a 2.488 Gb/s serial SONET/SDH data stream into four byte-wide
STS-12/STM-4 data streams and terminates the transmission frame section overhead. The VSC8026 performs
frame boundary detection and synchronization, optional descrambling, and provides section level alarm and
performance monitoring. A functional block diagram of the VSC8026 is shown in Figure 10.
Serial STS-48/STM-16 data is presented at the differential RXSIN input together with an associated differ-
ential clock RXSCLKIN, originating from the Clock and Data Recovery Unit (CRU). Data is captured on the
rising edge of RXSCLKIN+ (refer to Figure 17). Following the 1:8 deserialization, the frame boundary is
detected and the data stream is byte aligned before descrambling. The descrambled data stream is then byte de-
interleaved into four 8-bit parallel STS-12/STM-4 data streams at 77.76 MHz (to four PM5312s or four
PM5355s), consistent with the existing requirements for SONET/SDH intermediate level de-multiplexing. The
STS-12/STM-4 data streams are presented on the RXOUTA[7:0], RXOUTB[7:0], RXOUTC[7:0] and
RXOUTD[7:0] output pins at the falling edge of RXCLKOUT[A:D] (refer to Figure 19).
Figure 10: VSC8026 Functional Block Diagram
PROPB1ERR
SELSTS48C
RXCLKOUT[A:D]
DISDSCRM
RESET
CONTROL
&
ALARM DETECTION
RXFPOUT
RXFRERR
RXSEF
SELFRDET[1:0]
FRDETEN
RXLOF
RXFPIN
EQULOOP
RXPIN[7:0]
REG
RXOUTA[7:0]
RXOUTB[7:0]
RXOUTC[7:0]
1
0
RXSIN+/-
RXSCLKIN+/-
FRAMER
DSCR
DINT
1:8
DMX
RXSLBOUT+/-
RXSLBCLK+/-
RXOUTD[7:0]
RXOUT[A:D]P
B1ERR
B1 CHECK
FACLOOP
LOS
FPPAREN
0
311 MHz INTERNAL
CLOCK SOURCE
1
RXPCLKIN+/-
Equipment Loopback
The VSC8026 is equipped with a parallel input port, which for equipment loopback purposes interfaces to
the VSC8025 byte-wide STS-48/STM-16 output port. This port can also be used for interfacing to an STS-192/
STM-64 Demux circuit. When EQULOOP is high, the 1:8 Demux circuit is bypassed with data from the paral-
G52182-0, Rev. 4.0
1/5/00
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 19
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