VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s SONET-Compatible
8-Bit MUX/DEMUX Chipset
Data Sheet
VSC8021/VSC8022
VSC8021 Multiplexer AC Characteristics
(Over recommended operating conditions)
Figure 3: VSC8021 Multiplexer Waveforms
t
C
(1)
CLKI , CLKIN
High speed differential clock input
t
D
BYCLK (BYCLKN)
Byte clock input
(1)
CLK8
(2)
Phase adjustable ÷8 output
t
DSU
t
DH
tBCLK8
D1-D8, D1N-D8N
Parallel differential data inputs
VALID DATA(1)
VALID DATA(2)
t
CMD
CO, CON
High speed differential clock outputs
DO,DON
High speed differential data outputs
D01
D02
D03
D04
D05
D06
D07
D08
SYNC
CLK8 adjustment input
NOTES: (1) Negative edge is active edge.
(2) BYCLK/CLK8 timing required when SYNC not connected to ERR.
CLKI (CLKIN)
period x 8 = BYCLK (BYCLKN)
period.
= Don’t care.
Serialized Byte 1
Table 1: VSC8021 Multiplexer AC Characteristics (over recommended operating conditions)
Parameter
t
C
t
D
t
DSU
t
DH
t
CMD
t
BCLK8
Jitter (p-p)
Clock period
(1)
BYTE clock period (t
D
= t
C
x 8)
Parallel data set-up time
Data hold time
High-speed clock output (CO, CON) timing, falling
edge of CO to muxed data output, (DO, DON) timing
Byte clock to CLK8 timing
(2)
CLKI, CLKIN to DO, DON (max-min), (HI to LO),
same part, same pin at constant conditions
Description
Min
400
3.2
0.6
1.4
220
0.5
Typ
Max
Units
ps
ns
ns
ns
Conditions
350
1.0
<50
1.5
ps
ns
ps
NOTES: (1) The parts are guaranteed by design to operate from DC to a maximum frequency of 2.5GHz.
(2) Required when SYNC not connected to ERR.
Page 4
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VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52028-0, Rev 4.1
05/25/01